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Preliminary
NJU6053
PRELIMINARY
White LED Driver with Automatic Dimming Control
! GENERAL DESCRIPTION
The NJU6053 is a white LED driver with an automatic dimming control. It contains an output driver, a PWM controller, a luminance sensor control (power supply for sensor & A/D converter), a step-up DC/DC converter, a serial interface, etc. The NJU6053 can turn three independent lighting circuits on/off separately or simultaneously with instruction. The output driver ensures a 40mA maximum capability which allows the connection of 12 white LEDs (4 series x 3 parallels). Depending on the ambient light sensed with an external luminance sensor, the PWM controller controls PWM duty in 8 steps preselected out of 64 steps. In addition, the frequency of the DC/DC converter is high so that it permits the use of small, low-profile inductors and capacitors to minimize the footprint in space-conscious applications. All of these benefits make the NJU6053 suitable for the battery-powered portable applications such as a cellular phone, a camcorder, PDA, etc.
! PACKAGE OUTLINE
NJU6053KP4
! FEATURES
# Drives up to 12 white LEDs (4 series x 3 parallels) # Controls 3 outputs separately VSW = 18.0V(Max), IOUT = 40mA # Built-in PWM Dimming Control (Selectable 8 out of 64 steps) # Built-in Luminance Sensor Control (Power Supply for Sensor & A/D converter) (No MPU-access required after initial setting) # Built-in Temperature Compensation Circuit to Suppress the Characteristic Degradation of LEDs # Uses Small Inductor and Capacitors # 1.8V to 3.6V Operating Voltage for Logic Circuits (VDDL) # 3.0V to 5.5V Operating Voltage for Step-up Circuits (VDD) # CMOS Technology # Package : QFN28
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NJU6053
Preliminary
CONT2 CONT3 CONT1 VOUT
! QFN28 PIN CONNECTIONS (TOP VIEW)
NC
NC
NC
SW SW SW TEST VDD VDDL REQ
VSS VSS VSS VSS FB3 FB2 FB1
DATA
RSTb
VSO
CX
REF
SCK
SENS
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Ver.2003-12-02
Preliminary
! PIN DESCRIPTION
No. 26 27 22,23, 24 2 1 25 28 4 3 20 8,9,10 11,12, 13,14 6 5 7 17,18, 19 15,16, 21 Symbol VDD VDDL SW SCK DATA TEST REQ SENS RSTb VOUT FB1 to 3 VSS CX/TCLK VSO REF
CONT1 to 3
NJU6053
Type Power Power Input Input
Input / Output
Description VDD Power Supply - Power supply for step-up voltage VDDL Power Supply - Power supply for logic voltage - Relation: 1.8V VDDL VDD should be maintained. Switch - All these terminals should be connected together. Shift Clock - Serial data is latched on the rising edge of SCK. Serial Data Test - This terminal must be open. Data Request "L" : Writing command data "H": Reading sensor data Luminance Sensor Connection Reset - Active "L". Output - This terminal is connected to LED anode. Feedback Ground - All these terminals should be connected together. Oscillator Capacitor Connection / External Clock Input VSO Power Supply - Power supply for luminance sensor - 2.4V typical Reference Voltage - This terminal must be open. LED control Non Connection - These terminals must be open.
Output Input Input Input Power Input Power Input Output Input Output -
NC
Ver.2003-12-02
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NJU6053
! BLOCK DIAGRAM
L1 C1 VDD SW
Preliminary
D1 VOUT CONT1 TR1 C2
VSO
Regulator
CONT2 TR2 CONT3 TR3
SENS
A/D Converter *1
Register
PWM Controller
VDDL REQ SCK DATA
Serial Interface
Logic
FB1 FB2 A2 A1 FB3 REF VREF RLED
RSTb CX/ TCLK
Reset
OSC
VSS
TEST
Note : Either the NPN or PNP transistor can be used to switch outputs. If the PNP transistor is used, in order to limit the current coming into the NJU6053, a resistor should be inserted between the CONT pin and the base of PNP transistor. The resistance should make the base current equal to ILED/hEF, otherwise, if the base current is much larger than ILED/hEF, efficiency of the NJU6053 will go down, if the base current is smaller than ILED/hEF, the LED current cannot reach the desired value.
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Ver.2003-12-02
Preliminary
! FUNCTIONAL DESCRIPTONS
(1)
NJU6053
LED CURRENT CONTROL The NJU6053 incorporates the LED current control circuit to regulate the LED current (ILED), which is programmed by the feedback resistor (RLED) connected between the FB and VSS terminals. The reference voltage VREF is internally regulated to 0.6V typical and connected to the positive input of the built-in comparator A1. Formula (1) is used to choose the value of the RLED, as shown below. RLED = VREF / ILED VREF=0.6V (typ.) Referring to the block diagram is recommended for understanding the operation of the LED current control. The ILED is the constant current programmed by the RLED. When the feedback voltage on the FB terminal reaches above the reference voltage VREF on the REF terminal (i.e., ILED is above the level programmed by RLED), the output capacitor C2 delivers the ILED. Once the feedback voltage drops below the reference voltage (i.e., ILED drops below the level programmed by RLED), the comparator A1 detects it and turns on the internal MOS switch, then the current of the inductor L1 begins increasing. When this switch current reaches 720mA and the comparator A2 detects it, or when the predetermined switch-on-period expires, the MOS switch is turned off. The L1 then delivers current to the output through the diode D1 as the inductor current drops. After that, the MOS switch is turned on again and the switch current increases up to 720mA. This switching cycle continues until the ILED reaches the level programmed by the RLED, then the ILED is maintained constant. When the feedback voltage is less than 1/2*VREF, the current limit of the MOS switch is reduced to 550mA typical. This action reduces the average inductor-current, minimizes the power dissipation and protects the IC against high current at start-up. The total forward-voltage of the LEDs must be greater than the power supply voltage VDD, otherwise the LEDs remain lighting up, being out of control. --- Formula (1)
(2) OUTPUT SWITCH CIRCUIT With built-in LED control and feedback circuits, NJU6053 can control LEDs on/off with software. But the maximum total output current can not exceed 40 mA. NJU6053 can turn LEDs in string on or off respectively via LED control pins, but can not make LED dimming control for individual lighting circuit. Corresponding to the lighted LEDs, one of three feedback pins (FB1 to FB3) become active. For details of relationship between the lighted LED and feedback pin, refer to (6) Serial Interface.
(3) OSCILLATOR The built-in oscillator incorporates a reference power supply, so its frequency is independent from the VDD. The frequency is varied by the external capacitor CX, as shown in Figure 7.
(4) LUMINANCE SENSOR CONTROL The luminance sensor control circuits consist of the power supply for sensor and the A/D converter. The A/D converter senses the voltage on the SENS terminal and selects 1 out of 8 registers (PWM REGISTER 0-7). And the data in the selected register is reflected to the PWM duty (PWM dimming control). The contents of the registers can be programmed through the serial interface, in other words, the dimming control is user-settable. The voltage sense and the register selection are updated at regular intervals, and the interval period is set by the "DIVIDE" bits. The selected register is held by setting "1" at the "HOLD" bit of the command data.
Ver.2003-12-02
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NJU6053
(5)
Preliminary
PWM DUTY vs. PWM REGISTER
DUTY OFF 3.13% 4.69% 6.25% 7.81% 9.38% 10.94% 12.50% 14.06% 15.63% 17.19% 18.75% 20.31% 21.88% 23.44% 25.00% REGISTER 0,1,0,0,0,0 0,1,0,0,0,1 0,1,0,0,1,0 0,1,0,0,1,1 0,1,0,1,0,0 0,1,0,1,0,1 0,1,0,1,1,0 0,1,0,1,1,1 0,1,1,0,0,0 0,1,1,0,0,1 0,1,1,0,1,0 0,1,1,0,1,1 0,1,1,1,0,0 0,1,1,1,0,1 0,1,1,1,1,0 0,1,1,1,1,1 DUTY 26.56% 28.13% 29.69% 31.25% 32.81% 34.38% 35.94% 37.50% 39.06% 40.63% 42.19% 43.75% 45.31% 46.88% 48.44% 50.00% REGISTER 1,0,0,0,0,0 1,0,0,0,0,1 1,0,0,0,1,0 1,0,0,0,1,1 1,0,0,1,0,0 1,0,0,1,0,1 1,0,0,1,1,0 1,0,0,1,1,1 1,0,1,0,0,0 1,0,1,0,0,1 1,0,1,0,1,0 1,0,1,0,1,1 1,0,1,1,0,0 1,0,1,1,0,1 1,0,1,1,1,0 1,0,1,1,1,1 DUTY 51.56% 53.13% 54.69% 56.25% 57.81% 59.38% 60.94% 62.50% 64.06% 65.63% 67.19% 68.75% 70.31% 71.88% 73.44% 75.00% REGISTER 1,1,0,0,0,0 1,1,0,0,0,1 1,1,0,0,1,0 1,1,0,0,1,1 1,1,0,1,0,0 1,1,0,1,0,1 1,1,0,1,1,0 1,1,0,1,1,1 1,1,1,0,0,0 1,1,1,0,0,1 1,1,1,0,1,0 1,1,1,0,1,1 1,1,1,1,0,0 1,1,1,1,0,1 1,1,1,1,1,0 1,1,1,1,1,1 DUTY 76.56% 78.13% 79.69% 81.25% 82.81% 84.38% 85.94% 87.50% 89.06% 90.63% 92.19% 93.75% 95.31% 96.88% 98.44% 100.00%
PWM DIMMING CONTROL By setting the duty data at "PWM REGISTER" bits, 8 out of 64 registers are assigned to the PWM REGISTER 0-7. The PWM duty is changed depending on the register selected by the SENS voltage. The relation between the PWM REGISTER and its duty is shown below. TABLE 1
REGISTER 0,0,0,0,0,0 0,0,0,0,0,1 0,0,0,0,1,0 0,0,0,0,1,1 0,0,0,1,0,0 0,0,0,1,0,1 0,0,0,1,1,0 0,0,0,1,1,1 0,0,1,0,0,0 0,0,1,0,0,1 0,0,1,0,1,0 0,0,1,0,1,1 0,0,1,1,0,0 0,0,1,1,0,1 0,0,1,1,1,0 0,0,1,1,1,1
The relation between the PWM REGISTER and SENS voltage is reversed by the "REV" bit, as follows. TABLE 2 REV REV vs. PWM REGISTER PWM REGISTER PWM REGISTER0 PWM REGISTER1 PWM REGISTER2 PWM REGISTER3 PWM REGISTER4 PWM REGISTER5 PWM REGISTER6 PWM REGISTER7 PWM REGISTER7 PWM REGISTER6 PWM REGISTER5 PWM REGISTER4 PWM REGISTER3 PWM REGISTER2 PWM REGISTER1 PWM REGISTER0
0
1
Note 1) For the information on the relation between PWM duty and LED current (ILED), refer to "(10-1) PWM DUTY and LED CURRENT". Note 2) For the information on the relation between SENS voltage and PWM REGISTER, refer to "DC ELECTRICAL CHARACTERISTICS".
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Ver.2003-12-02
Preliminary
(6) SERIAL INTERFACE
NJU6053
(6-1) SERIAL DATA WRITE The serial data is latched into the shift register on the rising edge of the serial clock (SCK), and determined on the rising edge of the data request (REQ). The serial data format should be the MSB first. For COMMAND data transmission, the command data 1 (CMD1) and the command data 2 (CMD2) should be continuous. The CMD1 is first, then the CMD2. If only 1-byte data is transferred, this data is recognized as the CMD1. Do not transmit more than 2 bytes data, because the 3rd and 4th data are used only for maker test and the data after the 4th data will be ignored. If it's absolute necessary to send more than 2 bytes data in the user's application, only value (0,0,0,0,0,0,0,0) for the 3rd and 4th data can be accepted. For DUTY data transmission, 8 bytes for PWM REGISTER 0-7 should be continuous. The order is : PWM REGISTER 0, 1, 2, 3, 4, 5, 6 and 7. If 7bytes or less are transferred, all bytes are accepted. And if 9 bytes or more, the 9th and later are ignored. Note that the data should be in 8*n bits (n=integer number), otherwise it may cause malfunctions. And the SCK should be "0" when the REQ is changed.
SERIAL DATA FORMAT TABLE 3-1
B7 0
Command Data 1
B6 SOFF B5 B4 BRIGHT B3 B2 STBY B1 HOLD B0 REV
TABLE 3-2
B7 0
Command Data 2
B6 FB B5 INV B4 C1 B3 C2 B2 C3 B1 DIVIDE B0
TABLE 3-3
B7 1
Duty Data
B6 * B5 B4 B3 B2 B1 B0
PWM REGISTER * : "Don't care"
FIGURE 1 COMMAND DATA TRANSMISSION
REQ SCK DATA B7 6 5 4 3 2 1 0 B7 6 5 4 3 2 1 0
CMD 1
CMD 2
FIGURE 2 DUTY DATA TRANSMISSION
REQ SCK DATA PWM REGSTER B7 0 B7 1 B7 6 B7 7
Ver.2003-12-02
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NJU6053
Preliminary
(6-2) SENSOR DATA READ The DATA terminal becomes output state by setting the REQ terminal to "1" after the command data transmission. And the sensor data is read out, synchronizing with the SCK. The bit number corresponding to a selected register is "1" and the others are "0", as shown below.
FIGURE 3 SENSOR DATA READ (REV=0, PWM REGISTER4 selected)
REQ SCK DATA B7 0 1 2 3 4 5 6 7
Command Data (Input)
Sensor Data (Output)
(6-3) SOFF and BRIGHT By setting "1" at the SOFF bit, the luminance sensor control is disabled and the PWM duty is controlled by the BRIGHT bits, as shown below. TABLE 4 SOFF SOFF and BRIGHT BRIGHT REV
0
-
0
1
0,0,0 0,0,1 0,1,0 0,1,1 1,0,0 1,0,1 1,1,0 1,1,1
-
PWMREGISTER PWM REGISTER0 PWM REGISTER1 PWM REGISTER2 PWM REGISTER3 PWM REGISTER4 PWM REGISTER5 PWM REGISTER6 PWM REGISTER7 PWM REGISTER0 PWM REGISTER1 PWM REGISTER2 PWM REGISTER3 PWM REGISTER4 PWM REGISTER5 PWM REGISTER6 PWM REGISTER7
Note 1) When SOFF="0", luminance sensor control is enabled and PWM REGISTER is selected according to SENS voltage. Note 2) For the information on the relation between SENS voltage and PWM REGISTER, refer to "DC ELECTRICAL CHARACTERISTICS". (6-4) STBY By setting "1" at the STBY bit, the NJU6053 goes into the standby mode, as follows. - DC/DC converter, oscillator, reference voltage generator, and power supply for sensor are halted. - The contents of PWM REGISTER are maintained. - Luminance sensor control circuit is initialized. (6-5) HOLD By setting "1" at the HOLD bit, the selected PWM REGISTER is held and the luminance sensor control cannot be used. In other words, this setting works so that the luminance of the LEDs doesn't change even if the SENS voltage changes. The selection is initialized to the PWM REGISTER 0 by the reset. And when the standby is released, the selection is initialized to the PWM REGISTER 0 at REV="0" or the PWM REGISTER 7 at REV="1".
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Ver.2003-12-02
Preliminary
NJU6053
(6-6) REV By setting "1" at the REV bit, the correspondence between the PWM REGISTER and SENS voltage is reversed. TABLE 5 REV REV PWM REGISTER PWM REGISTER0 PWM REGISTER1 PWM REGISTER2 PWM REGISTER3 0 PWM REGISTER4 PWM REGISTER5 PWM REGISTER6 PWM REGISTER7 PWM REGISTER7 PWM REGISTER6 PWM REGISTER5 PWM REGISTER4 1 PWM REGISTER3 PWM REGISTER2 PWM REGISTER1 PWM REGISTER0 (6-7) DIVIDE By setting the DIVIDE bits, the sensor-sampling-time (tSENS) and PWM frequency (fPWM) are changed. Note that these parameters are varied depending on the oscillation frequency (FOSC). The formula (2) gives the sensor-sampling-time. tsens = 2 fosc
(17+N)
(sec)
--- Formula (2)
TABLE 6 DIVIDE
SENSOR SAMPLING TIME N Fosc 200KHz 0.655 sec 1.311 sec 2.621 sec 5.243 sec 400KHz 0.328 sec 0.655 sec 1.311 sec 2.621 sec 800KHz 0.164 sec 0.328 sec 0.655 sec 1.311 sec
100KHz 0,0 0 1.311 sec 0,1 1 2.621 sec 1,0 2 5.243 sec 1,1 3 10.486 sec And, the formula (3) gives the PWM frequency. 1 64 fosc (3+N) 2
fpwm = TABLE 7 DIVIDE 0,0 0,1 1,0 1,1
*
(Hz)
--- Formula (3)
PWM FREQUENCY N 0 1 2 3 Fosc 100KHz 195.3 Hz 97.7 Hz 48.8 Hz 24.4 Hz 200KHz 390.6 Hz 195.3 Hz 97.7 Hz 48.8 Hz 400KHz 781.3 Hz 390.6 Hz 195.3 Hz 97.7 Hz 800KHz 1562.5 Hz 781.3 Hz 390.6 Hz 195.3 Hz
NOTE) PWM frequencies written in bold or neighbors are recommended, otherwise it might cause LED flickering.
Ver.2003-12-02
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NJU6053
Preliminary
(6-8) C1, C2, C3 If set C1 bit of command data to 1, CONT1 pin becomes "H" level, FB1 pin will be active. If set C2 bit of command data to 1, CONT2 pin becomes "H" level, FB2 pin will be active. If set C3 bit of command data to 1, CONT3 pin becomes "H" level, FB3 pin will be active. If set more than one bit of command data's C1, C2, and C3 bits to 1, only the feedback pin with the smaller pin number will be active.
(6-9) INV If set the INV bit of command data to 1, the output at CONT pins will be reversed.
INV 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Command data C1 C2 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1
C3 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
CONT1 L L L L H H H H H H H H L L L L
CONT2 L L H H L L H H H H L L H H L L
Output CONT3 L H L H L H L H H L H L H L H L
FB pin FB1 FB3 FB2 FB2 FB1 FB1 FB1 FB1 FB1 FB3 FB2 FB2 FB1 FB1 FB1 FB1
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Ver.2003-12-02
Preliminary
(8) RESET By setting the RSTb pin to "L", the NJU6053 is initialized into the following default status.
TABLE 8 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. RESET REV HOLD STBY BRIGHT SOFF DIVIDE C1,C2,C3 INV PWM REGISTER 0 PWM REGISTER 1 PWM REGISTER 2 PWM REGISTER 3 PWM REGISTER 4 PWM REGISTER 5 PWM REGISTER 6 PWM REGISTER 7 : (0) : (0) : (0) : (0,0,0) : (0) : (0,0) : (0,0,0) : (0) : (0,0,0,0,0,0) : (0,0,0,0,0,0) : (0,0,0,0,0,0) : (0,0,0,0,0,0) : (0,0,0,0,0,0) : (0,0,0,0,0,0) : (0,0,0,0,0,0) : (0,0,0,0,0,0) Refer to Table 5 Sensor sampling is enabled Standby Off
NJU6053
(7) LEVEL SHIFTER The level shifter allows the communication with the MPU working at the power supply voltage lower than the VDD. Apply the MPU power-supply-voltage on the VDDL terminal. The voltage range is: 1.8VVDDL3.6V .
Luminance sensor control is enabled
DUTY 0% (LED OFF) DUTY 0% (LED OFF) DUTY 0% (LED OFF) DUTY 0% (LED OFF) DUTY 0% (LED OFF) DUTY 0% (LED OFF) DUTY 0% (LED OFF) DUTY 0% (LED OFF)
(9)
TEMPERATURE COMPENSATION The reference voltage (VREF) generator has temperature compensation, which suppresses the characteristic degradation of LEDs at high temperatures. Refer to "ILED vs. Temperature" shown in the "DC Electrical Characteristics".
(10) APPLICATIONS INFORMATION (10-1) PWM DUTY and LED CURRENT The average LED current is programmed with the single resistor RLED and the PWM duty, as shown in Formula (4).
I LED(avg) = I LED(max) I LED(max) = VREF R LED
DUTY 100
--- Formula (4)
(10-2) INDUCTOR SELECTION Formula (5) is used to choose an optimum inductor, as shown below:
V 2 OUT - VIN I LED L= 2 I LIMIT f OSC
--- Formula (5)
: Power conversion efficiency (= 0.7 to 0.8)
Ver.2003-12-02
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NJU6053
Preliminary
The power supply voltage VIN may fluctuate in battery-powered applications. For this reason, the minimum voltage should be applied to the VIN in Formula (5). The NJU6053 has about 200ns of delay time (TDELAY), which is defined as the period from the reach of the current limit 720mA to the MOS-switch-off. The TDELAY may cause an overshoot-inductor-current, which is called the peak current IL,PEAK, and calculated by Formula (6). Therefore, it is recommended that an inductor with a rating twice of the IL,PEAK and a low DCR (DC resistance) be used for high efficiency.
VIN (max) - VDS TDELAY I L,PEAK = I LIMIT + L
--- Formula (6)
VDS : Drain-Source voltage of the MOS switch (=ILIMIT*RON) VIN(max) : Maximum of VIN Voltage
(10-3) DIODE SELECTION A Schottky diode with a low forward-voltage-drop and a fast switching-speed is ideal. And the diode must have a rating greater than the output voltage and the output current in the system.
(10-4) CAPACITOR SELECTION A low ESR (Equivalent Series Resistance) capacitor should be used at the output to minimize output ripples. A multi-layer ceramic capacitor is the best selection for the NJU6053 application because of not only the low ESR but its small package. A ceramic capacitor as the input decoupling-capacitor is also recommended and should be placed as close to the NJU6053 as possible
(10-5) SELECTION OF SWITCHING TRANSISTOR Either the NPN or PNP transistor can be used to switch outputs. If the PNP transistor is used, in order to limit the current coming into the NJU6053, a resistor should be inserted between the CONT pin and the base of PNP transistor. The resistance should make the base current equal to ILED/hEF, otherwise, if the base current is much larger than ILED/hEF, efficiency of the NJU6053 will go down, if the base current is smaller than ILED/hEF, LED current cannot reach the desired value.
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Ver.2003-12-02
Preliminary
! ABSOLUTE MAXIMUM RATINGS
PARAMETERS VDD Power Supply VDDL Power Supply Input Voltage Input Voltage Switch Voltage Power Dissipation Operating Temperature Storage Temperature SYMBOL VDD VDDL VIN1 VIN2 VSW Pd Topr Tstg CX/TCLK, REF, FB,SENS terminals REQ, DATA, SCK, RSTb terminals SW terminal CONDITIONS RATINGS -0.3 to +6 -0.3 to VDD -0.3 to VDD+0.3 -0.3 to VDDL+0.3 +18.0 T.B.D. -40 to +85 -55 to +125
NJU6053
Ta=25C
UNIT V V V V V mW C C 3 4 NOTE
NOTE1) All voltages are relative to VSS = 0V reference. NOTE2) Do not exceed the absolute maximum ratings, otherwise the stress may cause a permanent damage to the IC. It is also recommended that the IC be used in the range specified in the DC electrical characteristics, or the electrical stress may cause mulfunctions and affect the reliability. NOTE3) The switch voltage VSW is the highest voltage in the system. This voltage must not exceed the absolute maximum rating. VSW =VF(LED) x N(LED) +VF(D1) +VREF VF(LED) :Forward Voltage of LED N(LED) :The Number of LEDs VF(D1) :Forward Voltage of Diode D1 For instance, when VF(LED) = 3.6V, N(LED)=4pcs, VF(D1)=0.3V, VREF=0.6V(TYP), VSW = 3.6V x 4 + 0.3V + 0.6V = 15.3V. NOTE4) Mounted on the glass epoxy board (50mm x 50mm x 1.6mm)
Ver.2003-12-02
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NJU6053
Preliminary
VDDL=1.8V to 3.6V, VDD=3.0V to 5.5V, Ta= -40 to 85C
SYMBOL
! DC ELECTRICAL CHARACTERISTICS
PARAMETERS VDD Power Supply VDDL Power Supply Output Current Reference Voltage Operating Current Standby Current VSO Power Supply PWM REGISTER0 Selected Voltage PWM REGISTER1 Selected Voltage PWM REGISTER2 Selected Voltage PWM REGISTER3 Selected Voltage PWM REGISTER4 Selected Voltage PWM REGISTER5 Selected Voltage PWM REGISTER6 Selected Voltage PWM REGISTER7 Selected Voltage Input "L" Level Input "H" Level Output "L" Level (1) Output "L" Level (2) Output "H" Level (1) Output "H" Level (2) Oscillation Frequency Oscillation Duty Switch Current Limit Switch On Voltage Over Voltage Protection CONDITIONS MIN 3.0 1.8 40
Ta=25C DC/DC Converter OFF fosc=350kHz
TYP
MAX 5.5 3.6
UNIT
NOTE
VDD VDDL IOUT VREF IOPR ISTBY VSO VD0 VD1 VD2 VD3 VD4 VD5 VD6 VD7 VIL VIH VOL1 VOL2 VOH1 VOH2 fOSC DOSC ILIMIT VDS(on) VOVP
SENS terminal, REV=0 SENS terminal, REV=0 SENS terminal, REV=0 SENS terminal, REV=0 SENS terminal, REV=0 SENS terminal, REV=0 SENS terminal, REV=0 SENS terminal, REV=0 SCK, DATA, REQ, RSTb, terminals SCK, DATA, REQ, RSTb terminals DATA terminals VDDL=1.8V, IOL=0.4mA CONT terminals VOUT=15V, IOL=0.5mA DATA terminals VDDL=1.8V, IOH= - 0.04mA CONT terminals VOUT=15V, IOH= - 0.5mA VDD=3V, CX=82pF VDD=3V, CX=82pF SW terminal VDD=4.2V, VFB>VREF/2, Ta=25C SW terminal VDD=4.2V, ISW=720mA, Ta=25C VOUT terminal
V V mA 1 2 3 4 5
0.558
0.60 1.0
0.642 1.4 1
V mA A V V V V V V V V V V V V V V V
2.23 0 0.015VSO 0.030VSO 0.060VSO 0.110VSO 0.220VSO 0.440VSO 0.880VSO 0 0.8VDDL
2.4
2.57 0.0055VSO 0.0185VSO 0.040VSO 0.090VSO 0.180VSO 0.360VSO 0.720VSO VSO 0.2VDDL VDDL 0.2VDDL 1
0.8VDDL 14 245 77 610 350 82 720 1 17.5 455 87 825 1.4
kHz % mA V V 6
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Ver.2003-12-02
Preliminary
NOTE1) Output Current Test Conditions # TEST Command
B7 B6 B5 B4 B3 B2 B1 B0
NJU6053
0 0 0
1 0 1
1 0 0
1 0 0
1 0 0
0 0 0
0 0 0
0 0 0
# TEST Circuit VDD D1 L1 C1 C2 C4 RLED RLOAD R1 R3 fOSC
:5V :Schottky diode :6.8uH :4.7uF :1 uF :4.7uF :30 :750 :100k :100k :350kHz / Duty 82%
R3 C1
L1
D1
C4
A
C2
REQ
VDDL
TEST
VDD
SW
SW
Controller
R1 DATA SCK RSTb SENS VSO CX REF
SW
NC VOUT CONT3 CONT2 CONT1 NC NC RLED RLOAD
FB1
FB2
FB3
VSS
VSS
VSS
VSS
fOSC
Ver.2003-12-02
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NJU6053
Preliminary
NOTE2) TEMPERATURE COMPENSATION The reference voltage (VREF) generator has temperature compensation, which suppresses the characteristic-degradation of LEDs at high temperatures. The VREF is regulated to 0.6V typical in the temperature range up to 45C, and gradually decreases as the ambient temperature rises in the range higher than 45C.
1.0
VREF[V]
0.5
0.0 -50 -25 0 25 50 TEMPERATURE[] 75 100
VREF VS TEMPERATURE
FIGURE 4
VREF vs. TEMPERATURE
30
RLED=30 RLED=40
ILED[mA]
20
10
0 -50 -25 0 25 50 TEMPERATURE[] 75 100
ILED VSTEMPERATURE
FIGURE 5
ILED vs. TEMPERATURE
- 16 -
Ver.2003-12-02
Preliminary
NOTE3) Operating Current Test Conditions # TEST Command
B7 B6 B5 B4 B3 B2 B1 B0
NJU6053
0 0 0 NOTE4) Standby Current # TEST Command
B7
1 0 1
1 0 0
1 0 0
1 0 0
0 0 0
0 0 0
0 0 0
B6
B5
B4
B3
B2
B1
B0
0 0 0
* 0 1
* 0 0
* 0 0
* 0 0
1 0 0
* 0 0
* 0 0 * : "Don't care"
# TEST Circuit (Operating Current, Standby Ciurrent) LED :VF=3.6V, ILED=20mA D1 :Schottky diode L1 :6.8uH C1 :4.7uF C2 :1 uF C4 :4.7uF RLED :30 R1 :100k R3 :100 fOSC :350kHz / Duty 82%
R3 C1
L1
D1
A C4
C2
TEST
REQ
VDDL
VDD
SW
SW
Controller
R1
DATA SCK RSTb SENS VSO CX REF
SW
NC VOUT CONT3 CONT2 CONT1 NC NC RLED FB1 FB2 FB3 VSS VSS VSS VSS
fOSC
Ver.2003-12-02
- 17 -
NJU6053
Preliminary
B7 B6 B5 B4 B3 B2 B1 B0
NOTE5) VSO Power Supply Test Condition # TEST Command 0 0 0 0 # TEST Circuit LED D1 L1 C1 C2 C4 RLED R1 R2 R3 fOSC 1 1 1 0 1 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
:VF=3.6V, ILED=20mA :Schottky diode :6.8uH :4.7uF :1uF :4.7uF :30 :100k :1k :100 :350kHz / Duty 82%
R3 C1
L1
D1
C4
C2 TEST REQ VDDL VDD SW SW SW
Controller
R1 DATA SCK RSTb SENS VSO CX REF
NC VOUT CONT3 CONT2 CONT1 NC NC RLED
FB1
FB2
FB3
VSS
VSS
VSS
VSS
R2
V
fOSC
- 18 -
Ver.2003-12-02
Preliminary
fOSC vs C X fOSC vs CX 1000 900 800 700 600 500 400 300 200 100 0 0 100 200 CX(pF) 300 400 500
NJU6053
NOTE6) OSCILLATOR The built-in oscillator incorporates a reference power supply, so its frequency is independent from the VDD. The frequency is varied by the external capacitor CX, as shown below.
fOSC(kHz)
Figure 7 fOSC vs. CX (Reference but not guaranteed)
Ver.2003-12-02
- 19 -
NJU6053
Preliminary
VDDL=1.8V to 3.6V, VDD=3.0V to 5.5V, Ta= -40 to 85C SYMBOL tSCCY "High" Level "Low" Level tWSCH tWSCL tREH tDIS tDIH tD0 tC0 tRES tWREH tr tf tRSL MIN 1.0 400 400 800 400 400 400 800 1.0 TYP MAX 200 400 100 100 UNIT
NOTE
! AC ELECTRICAL CHARACTERISTICS
PARAMETERS SCK Clock Cycle SCK Clock Width REQ Hold Time Data Set-Up Time Data Hold Time Output Data Delay Time CL=20pF CONT Output Delay Time CL=20pF, VOUT=15V REQ Set-Up Time REQ High Level Width REQ,SCK,DATA Rising Time REQ,SCK,DATA Falling Time RSTb Pulse Width
s ns ns ns ns ns ns ns ns ns ns ns s
Serial Input Timing REQ
tWSCL tWSCH tRES tREH tWREH
SCK
tDIS
tSCCY
tDIH
DATA
B7
B6
B5
Bn
B0
Serial Output Timing
REQ
tWSCL tWSCH tRES tREH
SCK
tDO
tSCCY
DATA
B7
B6
B5
Bn
B0
- 20 -
Ver.2003-12-02
Preliminary
CONT Output Delay Time REQ
NJU6053
SCK
1
2
3
15
16
tCO
CONT
Reset Input Timing
tRSL
RSTb
0.3VDD 0.3VDD
Ver.2003-12-02
- 21 -
NJU6053
Preliminary
R3 L1 D1
! TYPICAL APPLICATION CIRCUIT
C1 C4
C2
TEST
REQ
VDDL
SW
SW
Controller
R1 DATA SCK RSTb SENS VSO CX REF
VDD
SW
Tr NC VOUT CONT3 CONT2 CONT1 NC NC
C3
FB1
FB2
FB3
VSS
VSS
VSS
VSS
[CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.
- 22 -
Ver.2003-12-02

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